A SiP solution provides a higher level of integration, lower cost, and flexible design and manufacturing toward system configuration. ChipMOS is capable of providing the service needed to make customers succeed with SiP technologies.
What is SiP? A System-in-Package (SiP) solution integrates an Application Specific Integrated Circuit (ASIC) chip with an EDO memory chip. Both chips are assembled into a new form factor that appears as a standard 14 x 22 mm2 plastic ball grid array (PBGA) package with 90 balls and 1.27mm ball pitch, or a customized 13 x 13 mm2 Mini-BGA package with 96 balls and 1.0 mm pitch. Typically, a size reduction of approximately 60% ~ 75% over the equivalent printed circuit board estate is achieved. Other benefits include simplified board design and reduced material cost. We can meet customers' requirements to design one or more ICs together with passive components into a standard or customized package format.
Total Technology Solutions The SiP solution forms a functional block or module that can be used as a standard component in system level manufacturing. ChipMOS is able to design packages through discussion with customers to achieve overall success in SiP development. By working closely with our customer, ChipMOS is capable of modeling the package electrically, mechanically and thermally to reduce design iterations. In addition, ChipMOS can manage the materials supply chain from development through volume manufacturing, while final testing of the package, including digital, mixed signal and RF testing, can be arranged in our testing fab. Finally, we can deliver the end product, completed to your specifications, to end-customers.
Benefits of SiP Approach ‧Smaller dimensions than individually packaged ICs ‧Enhanced electrical performance by positioning critical ICs closer within the package ‧Lower overall cost of ownership - Eliminate packaging cost (multiple ICs now in one package)
- Reduce system board complexity and layer count - Use less system board space than individually packaged ICs - Reduce overhead for customer (turnkey solutions for assembly, test, supply chain management, and drop-shipment)
‧Short time to market
- Changes can be made to the SiP without changing the system board - Design flexibility and easy redesign versus complex System on Chip (SoC) design - SiP allows plug-and-play insertion into one or multiple systems
Reliability / Manufacturing As new SiP designs are developed, the reliability is already established based on the reliability requirements of ChipMOS' existing packaging technology. Reliability analyses, such as pre-conditioning, temperature cycling test (TCT), and pressure cook test (PCT), etc., are conducted in accordance with JEDEC standards.